News

The OpenRAM team was invited to publish a paper at the IEEE International Electron Devices Meeting (IEDM) onEnabling Design Technology Co-Optimization of SRAMs through Open-Source Software. Prof. Guthaus will be presenting at the December meeting virtually.

Hunter Nichols presented his open-source PUF analysis tool -- Puffery. Prof. Guthaus was on the panel discussing gaps in EDA technology. 

Prof. Guthaus presented on OpenRAM Multiport Memory IP at the Design Automation Conference Designer/IP Forum. The authors of the presentation are Matthew R. Guthaus, Hunter Nichols, Michael Grimes, Jesse L. Cirimelli-Low, and Jennifer Sowash.

Prof. Guthaus presented a talk on OpenRAM: Enabling Memory Research at the Cadence CDNLive conference in Santa Clara on April 2-3, 2019. 

A major release of OpenRAM is now available. This contains multi-port support, power supply improvements, improved abstractions, and many bug fixes. Please check it out at: https://vlsida.github.io/OpenRAM/ 

We presented a poster at the Design Automation Conference on hybrid current-mode clocks. The first hybrid-mode clock synthesis methodology improves clock jitter-induced delay variation and saved 42-45% average power with similar skew on industrial benchmarks.

VLSI-DA group alumnus Riadul Islam started as an Assistant Professor at University of Michigan Dearborn in Fall 2017. 

Reducing Variability in Subthreshold Circuits

Reduced form-factor in portable electronics has made energy-efficiency the primary target. Subthreshold operation is a low-power technique delivering significant energy efficiency. However, circuits in subthreshold are very sensitive to process vari- ation. Utilizing subthreshold operation and leveraging energy efficiency necessitates compensation techniques to mitigate process variation.

This work focuses on subthreshold operation in Field Programmable Gate Arrays (FPGAs) and determines the components influencing circuit energy-efficiency.  Mitigating the impact of threshold voltage variation using body bias technique is stud- ied. Using this, a methodology to mitigate the impact of threshold voltage variation in standard cells is developed. With the support of CAD tools this methodology can be extended to FPGAs.

The specific contributions of this thesis are: design and implementation of a subthreshold FPGA chip using body bias as a compensation mechanism against thresh- old voltage variation. analysis of performance and energy of a subthreshold FPGA using a high-level characterization framework. Using this framework the minimum energy point of the subthreshold FPGA was found to be in deep subthreshold, and a performance window of 30X with a 2X energy range was identified. A design methodology to mitigate threshold voltage variation by delivering optimized and adaptive body bias in circuits with standard cells. Using two algorithms, this methodology produces standby energy savings of upto 21.06% on average and active energy savings of upto 9.62% on average.

The VLSI-DA group along with collaborators at Oklahoma State University have released the OpenRAM open source memory compiler projetc on GitHub. The work was presented at ICCAD in the paper, OpenRAM: An open-source memory compiler.

PhD candidate Riadul Islam's paper on CMCS: Current-Mode Clock Synthesis was accepted into the Transactions on VLSI. 

PhD student Riadul Islam had his journal article titled "Low-Power Clock Distribution Using a Current-Pulsed Clocked Flip-Flop" accepted for publication in the IEEE Transactions on Circuits and Systems I. Great work!

Rebecca Rashkin and Jie Zhang have joined the VLSI DA group to work on new medical and wearable sensor systems. Rebecca is pursuing her PhD while Jie is pursuing an MS in Computer Engineering. Welcome!