People

 

Prof. Matthew R. Guthaus  

Bin Wu (PhD Student) 

Hunter Nichols (PhD Student)

Jennifer Sowash (MS Student)

Yusu Wang (MS Student)

Jesse Cirimelli-Low (BS Student)

Joey Kunzler (BS Student)

 

Graduate Alumni

 

First PhD Graduates

(Left to Right: Seokjoong, Sheldon, and Xuchu)

Hany Fahmy, 2019, MS (Switched Capacitor Quasi-adiabatic Clocks)

Michael Grimes, 2018, MS (Multi-port Automation for SRAM Compiler Design), Achronix Semiconductor

Kyle Cordes, 2018, MS (A Study into the Feasability of Biometric Identification through ECG), Joby Aviation

Rebecca Rashkin, 2018, MS (Impact of Audio on Heart Rate Variability), Lecturer, UCSC

Riadul Islam, 2017, PhD (Current Mode Clocking and Synthesis considering Low Power and Skew), Assistant Professor, University of Michigan Dearborn

Rajsaktish Sankaranarayanan, 2017, PhD ( Reducing Variability in Subthreshold Circuits), Intel

Brian Chen, 2016, MS, Altera/Intel

Han Chen, 2016, MS, Intel

Brian Chen, 2016, MS, Intel

Jie Zhang, 2015, MS, Yodlee, Inc. 

Benjamin Lacara, 2014, MS, EMC Corporation

Jeff Butera, 2013, MS, Mentor Graphics

Sheldon Logan, 2013, PhD ( Thermal-Aware CAD for Modern Integrated Circuits ), Google

Seokjoong Kim, 2012, PhD (Low-Power Methodology for Fault Tolerant Nanoscale Memory Design), Oracle

Xuchu Hu, 2012, PhD (Analysis and Application of Inductance in Clock Distribution Networks), Cadence Design Systems

Kathryn Dobbins, 2011, SURF-IT, Michigan Tech -> U Michigan (grad school, Fall 2012)

Walter "Jas" Condley, 2011, MS (Analysis of High-Frequency Clock Trees with a Methodology for Local Resonant Clock Synthesis), Space Systems Loral

Curtis Andrus, 2010, MS (Lithography-Aware Layout Compaction), Gauda Inc. -> ListenLogic

Derek Chan, 2010, MS (Analysis of Power Supply Induced Jitter in Actively De-skewed Multi-Core Systems), Space Systems Loral

Keven Woo, 2010, MS (Fault-Tolerant Synthesis using Non-Uniform Redundancy), Intel

Suparna Das, 2008, MS 

Group circa 2009

Front (L to R): Marcelo Siero, Keven Woo, Raj Sankaranarayanan, Xuchu Hu, Seokjoong Kim

Back (L to R): Andrew Hill, Jas Condley, Sheldon Logan, Prof. Guthaus, Pranav Natesh, Vidyuth Srivatsaa

News

  • Google supports OpenRAM

    Google has provided a generous gift to support the OpenRAM memory compiler. This gift will be used for improved coordination with other open-source projects, improved process support, and other general improvements.

  • OpenRAM and VLSI-DA at Workshop on Open-Source EDA Tech

    Hunter Nichols presented his open-source PUF analysis tool -- Puffery. Prof. Guthaus was on the panel discussing gaps in EDA technology. 

  • Two VLSI-SOC Papers Accepted

    Two papers from the group were accepted into the VLSI-SOC to be held in Cuzco, Peru on October 6-9, 2019. The first was accepted as a long, oral presentation on Automated Synthesis of Multi-Port Memories and Control by Hunter Nichols, Michael Grimes, Jennifer Sowash, Jesse Cirimelli-Low and Matthew Guthaus. The second was accepted as a short, poster presentation on Bottom Up Approach for High Speed SRAM Word-line Buffer Insertion Optimization by Bin Wu and Matthew Guthaus.

  • DAC Designer/IP Forum Presentation

    Prof. Guthaus presented on OpenRAM Multiport Memory IP at the Design Automation Conference Designer/IP Forum. The authors of the presentation are Matthew R. Guthaus, Hunter Nichols, Michael Grimes, Jesse L. Cirimelli-Low, and Jennifer Sowash.

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